Huawei Tau Scaling Law: Moore’s Law Is Dead, Long Live LogicFolding
Huawei proposed a new chip scaling metric at IEEE ISCAS — signal delay over transistor size. What Tau Scaling Law and LogicFolding mean ...
AMD Vivado Drops Free Linux Support: FPGA Devs Take Action
AMD shipped Vivado 2026.1 on May 25 and buried the headline in its release notes: ...
Huawei Tau Scaling Law: Real Engineering, Unverified Claims
Huawei unveiled the Tau Scaling Law and LogicFolding architecture at IEEE ISCAS 2026, claiming 53% ...
AMD Ryzen AI Max PRO 400: Run 300B LLMs on a Single Machine
AMD's Ryzen AI Max PRO 400 brings 192GB unified memory and 160GB VRAM to x86 ...
NVIDIA Vera CPU Ships to Anthropic and OpenAI: What Developers Need to Know
NVIDIA delivered the first Vera CPUs to Anthropic, OpenAI, and Oracle in May 2026. Here ...
AMD EPYC Venice 2nm Production: Intel Slips to 2027
AMD EPYC Venice is now in production on TSMC 2nm — 256 cores, 1.6 TB/s memory bandwidth, 70% faster than Turin. Intel's Diamond ...
AMD at COMPUTEX 2026: HBM Memory Is Now AI’s Hard Limit
AMD CEO Lisa Su named HBM memory as the binding AI chip constraint at COMPUTEX ...
HBM Memory Is Now 63% of AI Chip Costs in 2026
Epoch AI data shows HBM memory hit 63% of AI chip costs in 2026. AMD's ...
AMD Vivado Drops Linux: Free FPGA Tools Cost $1,200 Now
AMD dropped Linux from Vivado free tier in 2026.1. Linux FPGA developers now face a ...
Nvidia’s $81.6B Quarter: What Blackwell Costs Developers
Nvidia Q1 FY2027 data center revenue hit $75.2B on Blackwell Ultra. Here is what the ...