By ByteBot
Moore’s Law was never a law — it was a bet. Gordon Moore guessed in 1965 that transistor density would double every two years, and the industry made his guess come true for six decades. Then US export controls cut off China from the machines that make the bet payable, and Huawei responded by proposing a different bet entirely: stop measuring chips by transistor size and start measuring them by how fast signals travel through them.
At IEEE ISCAS in Shanghai on May 25, Huawei unveiled the Tau (τ) Scaling Law and the LogicFolding architecture that implements it. The first chip built under both principles, the Kirin 2026, ships this fall. Whether you buy the framing or not, the engineering here is real — and the numbers are worth understanding.
What Tau Scaling Law Actually Says
Tau (τ) in circuit theory is a time constant: how quickly a signal can switch from one state to another. It is a function of resistance and capacitance in the wiring — the RC delay. The smaller τ is, the faster the circuit. Moore’s Law chased this by shrinking transistors so the wires between them got shorter. Huawei’s Tau Scaling Law argues that you can achieve the same effect architecturally, without needing smaller transistors at all.
The mechanism is LogicFolding. Instead of placing all logic on a flat 2D die, Huawei stacks circuit layers vertically. Shorter vertical connections replace longer horizontal wires, reducing both R and C, and therefore τ. It is conceptually similar to how high-bandwidth memory (HBM) stacking works for DRAM — applied here to logic circuits. Crucially, no extreme ultraviolet (EUV) lithography is required, which matters considerably when US sanctions have blocked ASML from selling those machines to China.
The Kirin 2026 Numbers
The Kirin 2026 is the first full commercial implementation of LogicFolding, debuting this fall in the Mate 90 series. Huawei’s claimed figures are specific: 238 million transistors per square millimeter — a 53.5% jump over conventional 2D design on the same process node. Performance cores gain 41% efficiency. Peak clock speed rises 12.7%.
For context, 238 MTr/mm² puts the Kirin 2026 in the same density neighborhood as TSMC’s 3nm node — achieved on existing Chinese fabrication infrastructure that tops out around 7nm-class DUV-based processes. Those figures come from Huawei’s own characterization. If they hold up to neutral-lab testing when the Mate 90 ships, the architectural bet paid off substantially.
Where the Skeptics Are Right
The skepticism circulating among chip analysts is legitimate. “1.4nm-equivalent” is not the same as “1.4nm transistors.” Huawei’s 2031 roadmap targets density equivalent to what a genuine 1.4nm process delivers — achieved through stacking, not by physically shrinking transistors to that scale. Omdia’s senior chip analyst put it plainly: Huawei is bonding logic dies on top of each other, achieving density through packaging, not through physically smaller transistors. That is a different achievement than what TSMC’s upcoming N1.4 process will deliver.
The Register called the Tau Scaling Law “less like Moore and more like marketing,” and that critique lands. Naming an engineering approach after a new fundamental law of semiconductor progress implies more disruption than “we got clever about 3D stacking.” The physics underneath LogicFolding is sound; the branding is doing some heavy lifting.
The Geopolitics You Cannot Ignore
None of this exists without US sanctions. EUV lithography is required to manufacture chips below 5nm by conventional means. The Netherlands blocked ASML from selling EUV machines to China under US pressure. Huawei, cut off from the leading edge of the global fab ecosystem, engineered around the constraint.
That is not a knock on the engineering. ARM succeeded in mobile computing by competing on power efficiency when it could not win on raw x86 clock speed. Huawei is running the same play: compete on a different axis when the standard axis is blocked. Innovation born of necessity is still innovation. The question is whether Tau Scaling Law becomes an industry framing that TSMC and Intel eventually adopt, or whether it remains a useful metric for Chinese-domestic chips that cannot access EUV. Both outcomes are meaningful.
What to Watch
Fall 2026 is the real test. When the Mate 90 series ships with Kirin 2026, independent benchmarks will either validate or complicate Huawei’s density and efficiency claims. For developers, the immediate impact is limited: this is a smartphone chip and does not change cloud compute or server infrastructure today. Longer term, if LogicFolding scales to AI accelerators and data center silicon — which is Huawei’s stated direction — the economics of edge AI inference in Chinese-market hardware shift considerably.
For now, watch the benchmarks. Huawei has been testing Tau Scaling principles across 381 chips over six years — this is not a paper proposal. Whether the Kirin 2026 delivers what the slide deck promises is the question that matters most, and the answer arrives this fall.
